Imec details roadmaps for advanced logic and memory

Imec is a research center for semiconductors and nanotechnologies in Belgium. They recently made several announcements and a briefing on their developments. Imec works in healthcare and many other fields, but is one of the leading developers of semiconductor technologies, in particular advanced lithography, working with ASML in the Netherlands. They are also working on a number of memory technologies. Let’s look at some recent developments.

Imec discussed a number of roadmaps. The figure below shows their vision for the development of wireless communication through the end of the decade as we move to ever higher frequency communication. These higher frequencies require compound semiconductor devices (such as InP) connected with CMOS logic in a planar package with an RF interposer.

Sri Samavedam spoke about the evolution of imec logic technology. The number of on-chip transistors appears to continue Moore’s Law growth, with the Apple M1 Ultra having 114B transistors as of March 2022. Although Moore’s Law continues, single-threaded performance growth has slowed significantly and chip design costs continue to rise. This led to the use of various domain-specific processors. Important features of future chips are dimensional scaling, new materials and device architectures, and co-optimization of system technology.

The figure below is a version of imec’s lithographic roadmap. Today’s 2-7 nm lithography semiconductors use ASML’s first generation of extreme ultraviolet (EUV) lithography equipment. Imec and ASML are working together on a new high numerical aperture hNA EUV machine in a lab in the Netherlands with the aim of bringing an hNA EUV into production by 2027 (much faster than the original ASML EUV machine).

Sri also talked about BEOL scaling, resistance and capacitance optimization, back-of-wafer power delivery, and various 2D and 2.5D chip architectures, which imec has called system technology co-optimization (STCO). There were also discussions of 3D chip system integration systems, including CMOS imagers, HBM-DRAM stacks, and high-performance computing. The Apple M1 Ultra uses an integrated Si-bridge package. The image below shows an imec roadmap for 3D slice connection integration. They also said that one of the main needs in 3D device design is EDA tools that enable such complex 3D designs.

Arnaud Furnemont intervened on the development of storage and memory technologies at imec. Memory faces demands for faster performance, lower costs, and lower power consumption. The slide below expands on MRAM technology, which is finding growing opportunities, especially in embedded devices. Arnaud also mentioned the developments in 3D memories, moving from NAND to a possible 3D DRAM and the first research on 3D SRAM.

He also talked about DNA memory for long-term storage and several liquid memory concepts.

There has also been a lot of talk about creating more sustainable semiconductor manufacturing. Lars Ake Ragnarsson pointed out that research shows that almost 75% of a mobile device’s carbon footprint is due to its manufacture. Imec worked on a sustainable virtual fab as well as with equipment and material suppliers as well as foundry and IDM players to improve process and equipment and material utilization.

Imec is a leading organization in the development of semiconductors and nanotechnology. Imec roadmaps show progress from lithography to a few angstrom features and enable 3D integration. New memory technologies will combine with current memories to enable storage and processing of the incoming tsunami of data.

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